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Sierra Monolithics Inc. (SMI) said it has been sampling the industry's first highly integrated, multi-rate serializer/deserializer (SERDES) chipset for OC-768 optical communications.
The chipset uses advanced silicon germanium (SiGe) process technology to support multi-rate operation while providing unprecedented performance and functional integration, and establishes the company as an early leader in the emerging market for 40 Gbps physical-layer integrated circuits, officials said.
As carriers seek to cost-effectively meet the growing demand for bandwidth, equipment and component suppliers are focusing on providing next-generation systems that reduce the cost-per-transmitted-bit metric in short-haul, metro and long-haul networks, officials said.
SMI's SERDES chipset "leapfrogs earlier 4:1/1:4 prototypes and provides a commercially available chipset to the market well ahead of the competition," the company also said. The solution provides superior performance in a highly integrated, two-chip solution that accommodates multiple applications in a variety of short-haul to long-haul market segments.
The chipset consists of the SMI4021, a 16:1 multi-rate multiplexer (mux) with integrated clock multiply unit (CMU) and the SMI4031, a 1:16 multi-rate demultiplexer (demux) with integrated clock and data recovery (CDR) unit that is capable of operating continuously from 37 Gbps to 46 Gbps.
The SMI4021/31 SERDES chipset is priced at $3,400 in OEM volumes of 10,000 per year. It is now sampling to the market and volume production is scheduled to commence in the fourth calendar quarter of 2002.
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