Broadcom Corp., a provider of wired and wireless
broadband communications semiconductors, earlier this week announced what it describes as a "highly integrated
optical networking chip" that features electronic dispersion
compensation (EDC) technology, which will help enable the widespread
deployment of 10 Gigabit per second optical networks.
The low-power, high-performance EDC device is designed to
extend transmission distance significantly by maintaining the integrity
and quality of the signal, and improves networking efficiency, enabling a
seamless, cost-effective upgrade to existing enterprise and metro service
transport networks. The Broadcom solution helps enable the widespread
deployment of 10 Gigabit per second (Gbps) optical networks.
Broadcom said that today's transport networks have a large installed base of legacy fiber
links dominated by 1 Gigabit Ethernet (GbE) and OC-48 (2.48 Gbps) optical
interconnect data transmissions. The increase in data traffic is driving the
need to upgrade those fibers with 10GbE and OC-192 links. However, at the
10 Gbps rate, Broadcom said, legacy fiber protocols are subject to dispersion that can limit
transmission distance and adversely affect the integrity of the signal itself.
To avoid this limitation, EDC technology has proven to be a viable long
distance solution by providing the throughput and distance improvements to
enhance these legacy fiber applications.
EDC technology is supported by the Optical Internetworking
Forum (OIF) a group currently defining a 10 Gbps interoperability
specification targeting optical links. The transmission distance of this
specification supports up to 120 km (2400 ps/nm), however, the maximum
distance currently supported is specified at up to 80 km.
To achieve this
reach extension and lower the cost of optics on existing fiber links, EDC
technology provides
customers an upgrade on existing OC-48 trunks beyond 80 km to OC-192,
while enabling the use of low-cost optics without the need to re-engineer the
link.
Utilizing a 0.13 micron CMOS process technology and consuming a little
over 1 Watt of power, the BCM8105 features 9.9 Gbps to 11.1 Gbps clock and
data recovery with a SFI-4 de-multiplexer that incorporates an adaptive EDC
equalizer. This capability extends the reach of the signal and improves
performance on DWDM (dense wavelength division multiplexing) metro and
long-haul SONET/SDH transmission systems.
Based on three previous generations of high-speed CMOS silicon designed
for the OC-48, OC-192 SONET/SDH and 10GbE markets, the new BCM8105 device is a
multi-rate solution that provides full adaptation on the EDC equalizer with
additional automatic tuning on the high-speed receiver threshold and phase
levels for BER (bit-error rate) optimization.
To provide customers with
smooth transitions in rolling out their EDC-based designs, Broadcom has
developed a pin-compatible footprint with the BCM8129 CDR de-multiplexer,
which is shipping in volume today and offers customers a lower cost high-speed
receiver solution without the EDC filter.
For this chip development, Broadcom said it worked closely with its customers to
help define, design and test next-generation systems using beta silicon that
includes the EDC equalizer on-chip. As a result, the BCM8105 device was
defined specifically to solve the dispersion issues associated with metro and
long-haul SONET/SDH transmission links, enabling customers to move forward
with EDC technology today.